Project update (long)

John S Gwynne jsg
Thu Sep 1 02:30:12 GMT 1994


Project update:

Ok, a lot has happen since the last I posted. I now have a working 68HC000
single board computer running. For those that are interested, the reset of
this post describes the board, the programming environment, things to-do, and
lastly the next ``system level'' building block.

1) 68HC000 main board:

This board is a 6-by-4 inch (cleared hole ground plane) card that that is in
itself a complete embedded controller. The processor is a 68HC000 rated at
16MHz; although I'm currently running it at 12 MHz. The board has complete
address and data buffering with all the necessary reset and power-up
functions. An external expansion port is included that provides 2Meg of
address space for future additions. Two 27C010-120's provide 1/2Meg of EPROM
storage for programs and permanent data lookup tables.  Two DS1225-150's
provide 16K of battery backup SRAM. These chips have internal lithium
batteries that have enough capacity to last for more than 10 years. In these
chips, ``adaptive'' lookup tables and data can be stored and maintained
without the risk of losing the information when power is removed.  An
NS16550AF and MAX232 provide a serial link to the outside world that has all
the modem handshake signals in addition to a few user definable spares that
can be used as we see fit. The schematic and board layout were created using
``EE Designer III.'' I will make the files available if anyone is
interested. For those that do not have this software, it may be easiest to
mail actual drawings (D-size). It takes about 36 hours to wire-wrapping.  It
would be nice to put this up on the WWW server, but I don't have the
time. Others may be interested in something a little more modern like a 683XX
or maybe the 68HC16 (I see Coactive is working on a GCC port).

2) The programming environment

This really worked out nice and is the reason why I went with this CPU (in
addition to cost). I have GCC configured as a cross compiler on ``coulomb''
(an R4K SGI Indigo). I modified the loader script and the make file rules so
code generation is invisible to the user. Consider the following example
which is a RAM test I used to continuously walk a bit through memory.  In the
event of failure, the CPU lock in an infinite loop.
**************** cut here *************
void Main()
{
  register int i, j;
  
  for (;;)
    for (i=0x200000;i<=0x203fff-0x200; i++)
      for (j=1; j<=0x80; j <<= 1 ) 
	{
	  *(char *)i = (char)j;
	  if (*(char *)i != (char)j) for(;;);
	}
}
**************** cut here *************
By simply typing ``make ram_test'', we have ready to burn data for the EPROM's
(in s-record format).
**************** cut here *************
S0050000743155
S11804504E5600004E71207C00200000B1FC00203DFF6E1A7073
S1180465010C80000000806E0C1080B010670260FED08060EC44
....cut cut cut .....
S1060405F80004F4
S9030000FC
**************** cut here *************
Most of the EPROM data for this simple program are exception vectors for the
68000 exception table. A disassembly of the actual program is as follows: (a
small wrapper program, not shown here, is automaticly included to 
initializes RAM (.data and .bss section) before calling our program.)
**************** cut here *************
00000048:       4E560000                link.w  fp,#0
0000004C:       4E71                    nop
0000004E:       207C00200000            movea.l #$200000,a0
00000054:       B1FC00203DFF            cmpa.l  #$203DFF,a0
0000005A:       6E1A                    bgt     *+26
0000005C:       7001                    moveq   #1,d0
0000005E:       0C8000000080            cmpi.l  #$80,d0
00000064:       6E0C                    bgt     *+12
00000066:       1080                    move.b  d0,(a0)
00000068:       B010                    cmp.b   (a0),d0
0000006A:       6702                    beq     *+2
0000006C:       60FE                    bra     *-2
0000006E:       D080                    add.l   d0,d0
00000070:       60EC                    bra     *-20
00000072:       5248                    addq.w  #1,a0
00000074:       60DE                    bra     *-34
00000076:       60D4                    bra     *-44
00000078:       4E5E                    unlk    fp
0000007A:       4E75                    rts
**************** cut here *************
This code was complied unoptimized as you might guess.  Optimization in this
case would not have resulted in the test that was called for since the
optimizer assumes the memory to be working and, for this particular test,
would not have re-read a value after having written it to memory; however
FYI, it cuts the length of this code in half. The optimizer actually does a
reasonably good job. Maybe only slightly slower and larger than if written in
assembly. It's a must for the EFI project as I see it.

In addition to generating EPROM data, I also have a RAM model that lets
a program be down-loaded over the serial port from coulomb into the
SRAM. Thus, smaller programs can be ran interactively.

I've complied glibc, but it really needs a ``mini'' kernel to be
useful. I may write one or hack the library not to make kernel calls. I
don't know yet....

3) Things to do

I need to enable the interrupts that will service the serial port and
the soon to be added watch-dog timer. Other than that, this board is about
full. the signal are very clean and the timing requirement are easily
meant at 12MHz. After these changes, I'll do some kind of burn-in test
for a week or so as a final test. At some-point I will also configure gdb to
work over the serial line.

4) Next building block

- I need a ``smart'' power supply for use in the car.....

- I'm also working on a companion board with 1Meg of DRAM and some other
stuff such as DIY_EFI bus support.


                                       John S Gwynne
                                          Gwynne.1 at osu.edu
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