diagnostic tool
Wen Yen Chan
chanwe at ecf.toronto.edu
Wed Jan 22 13:48:02 GMT 1997
Since there is interest in the plans for the data logger I will have them
scanned. My scanner is dead right now so it will take several days to get
all the plans captured. The designs that I will be posting will be a copy
of the original design notes (they may be a little difficult to follow).
I will try to compile a list of connections between the different chips
to make building the unit easier.
Constructing the logger is not very difficult (about 1 weekend of wiring).
Because of the relatively low clock speeds involved the device can be
hand wired. The only part of the construction which may pose some
problems is the fact that I used one GAL to simplify the design. I will
include the JEDEC file with the programming specifications for that GAL
in my later post. I will also try to make pre-programmed chips available.
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