Pulse doubler schematic

[jdzura at csc.com]

>I think I like Bruce's original idea the best, though.  Two 555s, each
>in monostable mode, one on the positive edge and one on the negative.
>That's one IC (556) plus some passive components, plus a couple
>transistors to combine the outputs.  Battery voltage works fine.  It
>also avoids programming the PIC.  You won't get a 50% duty cycle at all
>speeds, but it doesn't sound like that's a problem since the ECM uses a
>zero crossing detector.


I agree, KISS (keep it simple s.....) where ever possible. The only thing I worry
      about is the drift and resulting pulse width change over time and
      temperature. The  design I submitted uses a dual D Flip flop and an
      exclusive or (XOR) to generate a pulse at each transition (two 14 pin chips,
      and if 4000 series CMOS is used, it can also use battery voltage). It is
      just a digital version of Bruce's idea. The only problem is the frequencies
      are so low that the digital solution will also be forced to use an RC based
      oscillator. The frequency of the oscillator determines the pulse width.

If the ECM uses a zero crossing detector, does that mean all the signals are AC.
      Also, what is the Peak to Peak Voltage level? Do we have any idea of what
      minimum pulse width the ECM can detect?