GMP4 MPU information

[David A. Cooley]

Ludis,
You have any info as to whether the GM P5 differs from the "standard"
motorola HC11F1 and where?
Thanks,
Dave


At 04:37 AM 2/15/99 -0800, you wrote:
>The architecture of the GMP4 processor chip (used in the GM P4
>generation of ECMs) is almost the same as a Motorola 68HC11 with the
>following exceptions:
>
>Bits 7 and 6 of the CCR (S and X in an 'HC11) always read as 1's.
>The STOP instruction ($CF) is missing.
>The XGDX instruction ($8F) is missing.
>The XGDY instruction ($18 8F) is missing.
>
>The interrupt vector map is:
> $FFF0  SWI instruction
> $FFF2  Internal interrupt (UART & periodic interrupt)
> $FFF4  External interrupt
> $FFF6  Illegal instruction
> $FFF8  Bus reset (any read or write to $6000 through $6FFF)
> $FFFA  Watchdog reset
> $FFFC  Clock monitor reset
> $FFFE  Power on and external reset
>
>None of the 'HC11 I/O is present.  The GMP4 has it's own I/O registers
>mapped to $4000 through $400F.
>
>On-chip SRAM exists from $0000 through $01FF.  $0000 through $00FF is
>retained by a standby power supply.  Data in $0100 through $01FF will be
>lost when the main power supply shuts off.
>
>
>An MPU with the part number 16034980 was used to collect the above data.
>Several other part numbers are used interchangeably.  They may have
>differences.
>
>-- 
>Ludis Langens                               ludis (at) cruzers (dot) com
>Mac, Fiero, & engine controller goodies:  http://www.cruzers.com/~ludis/
>

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           David Cooley N5XMT           Internet: N5XMT at bellsouth.net
     Packet: N5XMT at KQ4LO.#INT.NC.USA.NA   T.A.P.R. Member #7068
       I am Pentium of Borg...division is futile...you will be approximated.
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