Emulator (was EFI control)

Ludis Langens ludis at cruzers.com
Mon Feb 12 10:56:40 GMT 2001


Chris Conlon wrote:
> 
> Personally I'd use 2 128k SRAMs, and 128k of whatever nonvolatile you
> prefer. This lets you d/l a complete rom image to the PIC's SRAM,
> burn it to NV (which may be slowish depending on what you use),
> swap the SRAMs (giving the ECU the new image) and then update the PICs
> SRAM from NVRAM. You'll need 74xx244s + 74xx245s (or equivalent) so
> that either the PIC "bus" or the ECU bus can talk to either SRAM. The
> NVRAM, assuming it's flash or parallel eeprom, can also hang off the
> PIC bus via 244/245s.

Read the GMecm archives.  This issue generated lots of messages soon
after gmecm was started.  The design eventually settled on a single
DualPortSRAM, a PIC, a battery controller chip, an RS232 driver/receiver
chip, and perhaps one or two other chips.  Sure, a DPRAM is more
expensive than regular SRAM, but it is less than an SRAM plus all the
glue logic needed.  DPRAMs aren't designed for battery powered data
retention, but it turns out that a simple battery can keep a DPRAM alive
for weeks/months.  A double sized DPRAM can let the ECU run from one
PROM image while another is (slowly) downloaded.  Battery backing up the
DPRAM allows the ECU to start running from it immediately after power up
- the data doesn't need to be copied from a seperate NVRAM.

-- 
Ludis Langens                               ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies:  http://www.cruzers.com/~ludis/


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