6801 relative address calculations

[Teller.John at orbital.com]

I'm in the process of writing a disassembler for the 6801, and I am a
little confused about Motorola's description of relative addressing for
this CPU.

Does it calculate the branch address from the address of the beginning of
the instruction or from the offset?

For instance:

F02F  20 0C     BRA $F03B  ; F02F + 0C = F03B

or is it:

F02F  20 0C     BRA $F03C  ; F030 + 0C = F03C

The disassembly does not make much sense if I do it the second way, but
there are chunks that don't quite make sense if I do it the first way:

F095  CE 00 61  LDX $0061
F098  6F 00     CLR [X]
F09A  09        DEX
F09B  26 FB     BNE $F096 ; This jumps to the 00 in the LDX instruction!

Am I converting $FB to -5 when it should be -3?  What gives?

--- John Teller