160 baud ALDL data - reading on a PC, counter 0?

Peter Gargano peter at ntserver.techedge.com.au
Thu Jun 17 11:47:04 GMT 1999


Techo question for PC savvy types...

Two weeks ago I asked about the 160 baud ALDL data format. 
I've since written a bit of code that uses the serial port's
CTS line as input, and DTR as a negative voltage output to
condition, with a single transistor, the ALDL signal. The code
simply uses CTS interrupts (modem change) and reads the PC's
8253/8254 counter channel 0 to generate a timestamps at each
CTS transition. It works well, but...

Does anyone know what frequency the AT clocks counter 0 at?
All my documentation says it's at 0.84 uSec (micro seconds)
BUT my measurements on a couple of Pentium and 486 machines 
indicate that it's closer to 0.43 uSec AND that it counts
in lots of 2 (ie. reading counter 0 always reads an even 
binary number). Now I know XTs and early ATs did clock counter
0 at 1.19 MHz, but when did they change to closer to 2 Mhz, or
am I losing the plot?

I'm going to "tidy up" this bit of code and make it available
to show the raw 160 baud ALDL data stream in real time. I'm
not going to try and decode the data stream because I'm going 
to give away this code to whoever wants it. It'll be able to
run on an XT AND it should also run fine in a DOS box too. Any
thoughts on the best way to display this raw data?

regards,
-- 
Peter Gargano



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