Delayed ref pulse (was Re: Spark latency correction)

Don.F.Broadus at ucm.com Don.F.Broadus at ucm.com
Mon Sep 20 14:07:58 GMT 1999


This is an interesting thread lately I have been experimenting with the EST
spark using a Sun 404 distributor machine.
I cut holes in the dist cap right under the #1 and #4 spark plug wire
terminal using a hole saw. I connected the dist/coil/wires and
plugs. The first test was in bypass mode, with a non inductive timing light
aimed at the #1 terminal the rotor was at the far end on the terminal
indicating the 5 deg adv.  The rotor can actually be seen to move like the
old mechanical adv days.  I moved the RPM up from idle and at about 1200-
1500 engine RPM  the module acted like it snapped a switch closed and
caused another 10 deg adv, As the RPM went up no further adv was noticed ,
at 3500 engine RPM the spark is unsteady . I will bring out my notes about
connecting the EST to REF and post them. I have found all of your comments
very helpful  on this EST thread.
 
Thanks  Don      




> -----Original Message-----
> From:	Shannen Durphey [SMTP:shannen at grolen.com]
> Sent:	Sunday, September 19, 1999 11:49 PM
> To:	gmecm at efi332.eng.ohio-state.edu
> Subject:	Delayed ref pulse (was Re: Spark latency correction)
> 
> Ward wrote:
> > 
> > On Sun, 19 Sep 1999 17:26:29 -0400, Shannen Durphey wrote:
> > 
> > > Ward wrote:
> > >
> > > > Please remember that spark advance is actuall dely, since yiu cant
> time
> > > > travel backwards to start spark, its actualy delay from the prior
> TDC
> > event.
> > > > to calulate a V8 time between TDC's do 15/RPM,
> > >
> > > I've tried to see this by routing the REF to EST and applying 5V to
> > > bypass.  I thought that I'd see a displaced timing mark with my timing
> > > light, but it didn't happen.  What was I missing?
> > > Shannen
> > >
> > 
> > No. The delay in the processor won't be involved, and the inductive
> > discharge is also not in that loop.
> > 
> > When you put by pass to +5 you switch the DRP output ckt from the coil
> > driver to the DRP pin. You also disble the startup dwell and timing
> advance
> > function. There is a 5 - 6 deg spark advance during by pass operation.
> > 
> > So I don't see how that would show the CPU indiced delay correction?
> > 
> > Ward
> > 
> Sorry, I wasn't clear.  I'm not looking for delay correction.  I'm
> trying to recreate a display which used a distributor, a 2 channel
> scope, and a coil to show the delayed pulse that timing is calculated
> from.  I don't remember an ecm in the display, but possibly there
> was.  I don't have the scope and I was hoping I could use a timing
> light.
> 
> The 89 Vette I was using showed no difference in timing, as viewed at
> the balancer, whether the ecm was running on base timing or ref pulses
> looped back to the EST terminal.  I expected to see retarded timing.
> 
> Shannen



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