[syclone bin]

[Dig]

"John S. Gwynne" <jsg at jsgpc.mrcday.com> wrote:
> Bruce has a 2 bar Syclone bin ("latesycl") that I disassembled and
> correlated to the axxc/anht bin. Out of a little over 6000 lines of
> assembly, only about 900 lines correlated. the factory test mode were
> basically the same along with most of the table lookups and such in
> high memory. I placed the results at
> <ftp://jsgpc.mrcday.com/pub/gmecm/latesycl.S>. The comments in this
> come from the ECMGUY's disassembly of the anht bin.  If anyone has a
> good commented disassembly of this code, send it to me. I would like

I've been working on it in bits and pieces. Here's a chunk of boost code
@ e62d. My Diassembler is quite a bit different from yours, but I like
the way it lets me bulk-enter the symbols.

I've been trying to build a master symbol-table in my non-existant spare
time. Really, all I need to do is sit down some weekend and type 'em all
in from the cal data sheet, but I'm not much of a typist.

My commenting style isn't much, you'll notice. Can you tell I'm a 
recovering C programmer? 

//I gotta comment this code better

e62d 97bd       Re62d       STAA  DES_BOOST  
/*Des_boost returned from LUT */
e62f 90bc                   SUBA  BOOST_PSI
e631 2402                   BCC   Re635     ;*+$04
/*Subtract actual boost from desired.. if actual
  is greater, then jump to E635 (deadband code) */

e633 40                     NEGA  
e634 5c                     INCB  
e635 b1c3b5     Re635       CMPA  KBST_ERDB
/* Compare the two's comp boost error to the deadband
   value... basically, check to see if the error is
   anything to worry about */ 

e638 2327                   BLS   JRe661     ;*+$29
/* If it isn't, jump around the inc/dec code */
e63a 96bb                   LDAA  LZbb
e63c 2705                   BEQ   Re643     ;*+$07
e63e 7a00bb                 DEC   LZbb
e641 201e                   BRA   JRe661
/* This is a timer of some sort... related to the
   boost dec. timer */

     ;*+$20
e643 96af       Re643       LDAA  WGATE_DC
e645 5d                     TSTB  
e646 260c                   BNE   Re654     ;*+$0e
/* B contains whether boost is higher or lower , I
   think. They're testing B and branching to either
   the positive step, or the negative.*/


e648 f6c3b7                 LDAB  KCL_UDRT_L
e64b bbc3b9                 ADDA  KDC_PSTEP

/* We're low. Use the low version of the timer 
   increment, and add the positive step value */

e64e 240d                   BCC   Re65d     ;*+$0f

/* Our cup overfloweth. Just use $FF and go store it*/

e650 86ff                   LDAA  #$ff
e652 2009                   BRA   Re65d     ;*+$0b
e654 f6c3b6     Re654       LDAB  KCL_UDRT_H
e657 b0c3b8                 SUBA  KDC_NSTEP

/*we're too high. use the high update rate time,
  and subtract the negative step value.

e65a 2401                   BCC   Re65d     ;*+$03

/* we underflowed. */

e65c 4f                     CLRA  
e65d 97af       Re65d       STAA  WGATE_DC

/* Finally! We have our WGDC. */

e65f d7bb                   STAB  LZbb

/* Load that timer back into memory*/

e661 2018       JRe661      BRA   Re67b     ;*+$1a
e663 96b3       SRe663      LDAA  BST_DEC_TM
e665 2704                   BEQ   Re66b     ;*+$06
e667 7a00b3                 DEC   BST_DEC_TM
e66a 39                     RTS   



I've got other chunks done at home, too, this is all I had available to
me here. I'm trying to get the TCC code worked through, since there isn't
good documentation in the XDE that's floating around.

I'll try to transfer what I have into your file, and send it back.
A well commented $58 code would be a great boon to the general public.
What you've posted helps me a ton, since it fills in the operational
gaps that I don't have.

Has anyone put together a register map for the 730 or 749? It'd be nice
to a hardware/software interface document on them. Table data independent,
like.

Later,

Dig





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