EMI

[John S Gwynne]

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   In message <940607133202.21830b4d at STDVAX.GSFC.NASA.GOV> , you write:
 
| I suspect that rather than a high speed cpu, you might want to consider off
| -loading some of the calculations.  For example - frequency counting.
| 
| So you get a high accuracy clock.. divide down the output frequencies so 
| that you have a 1Hz clock to gather slow data and maybe a 1K Hz clock to 
| gather fast data.  At the pulse you latch whatever data is there (and maybe 
| reset the counters).  The cpu can then read the latched data at is leasure 
| and make adjustments accordingly.

I currently have a backplane, that accepts 4.5x6.5in plugboards, running with
600nS read and write times. This (unofficial) "DIY_EFI_bus" provides the
interface to the data acquisition/sensors circuits which may freely acquire
data.  This bus uses all HCT logic and seems to work fine. The cards that
plug into this bus do "off load" burdens like frequency counting as I posted
in the article "a 82c54 based computer tachometer". My goal at this point is
to add a relatively fast CPU with enough resource to easily run software
written in C (I would even like to use floats!). While I will maintain the
slow external bus, I want a fast internal CPU bus. On two side-by-side
plugboards, I would like to have the complete CPU portion of this controller
(I may separately shield these two cards).

Thanks for you comments on the AS. Hopefully ALS is somewhere between
AS and HCT in terms of noise immunity. I sense a rocky-road ahead.... :(
Anyone else with comments?

                                       John S Gwynne
                                          Gwynne.1 at osu.edu
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