Diacom Interface!
peter paul fenske
pfenske at direct.ca
Sat Jul 12 22:26:32 GMT 1997
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Here ya go
GL:peter
At 07:58 AM 7/12/97 +1000, you wrote:
>peter paul fenske wrote:
>>
>> Hi Fred and all
>> You will need the include files.
>> Either mail me direct or if people want i will
>> include em with the text..
>
>
>If you could Peter, please send thos eto me also.
>
>Regards
>
>Alex
>
>Used to 'ave monster ported R100 small block eater.
>
>
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Content-Disposition: attachment; filename="ALT_KEY.H"
/* ALT_KEY.H */
/* Defines PC extended key codes */
#define NUL_CHAR 3
#define ShTab 15
#define ALTQ 16
#define ALTW 17
#define ALTE 18
#define ALTR 19
#define ALTT 20
#define ALTY 21
#define ALTU 22
#define ALTI 23
#define ALTO 24
#define ALTP 25
#define ALTA 30
#define ALTS 31
#define ALTD 32
#define ALTF 33
#define ALTG 34
#define ALTH 35
#define ALTJ 36
#define ALTK 37
#define ALTL 38
#define ALTZ 44
#define ALTX 45
#define ALTC 46
#define ALTV 47
#define ALTB 48
#define ALTN 49
#define ALTM 50
#define F1 59
#define F2 60
#define F3 61
#define F4 62
#define F5 63
#define F6 64
#define F7 65
#define F8 66
#define F9 67
#define F10 68
#define Home 71
#define Up 72
#define PgUp 73
#define Left 75
#define Right 77
#define End 79
#define Down 80
#define PgDn 81
#define Ins 82
#define Del 83
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Content-Disposition: attachment; filename="ASCII.H"
/* ASCII.H DRT v 1.00 930302 */
/* Standard definitions of ASCII control characters */
#define NUL 0x00
#define SOH 0x01
#define STX 0x02
#define ETX 0x03
#define EOT 0x04
#define ENQ 0x05
#define ACK 0x06
#define BEL 0x07 /* beep */
#define BS 0x08 /* backspace */
#define HT 0x09 /* tab */
#define LF 0x0A /* linefeed */
#define VT 0x0B
#define FF 0x0C /* formfeed (^L) */
#define CR 0x0D /* carriage return */
#define SO 0x0E
#define SI 0x0F
#define DLE 0x10
#define DC1 0x11 /* ^Q */
#define DC2 0x12
#define DC3 0x13 /* ^S */
#define DC4 0x14
#define NAK 0x15
#define SYN 0x16
#define ETB 0x17
#define CAN 0x18
#define EM 0x19
#define SUB 0x1A
#define ESC 0x1B
#define FS 0x1C
#define GS 0x1D
#define RS 0x1E
#define US 0x1F
#define SP 0x20 /* space */
#define DEL 0x7F /* delete */
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Content-Disposition: attachment; filename="COMDEFS.H"
/* COMDEFS.H DRT v 2.10 950218
This include file contains most of the definitions
needed for a PC serial communications program. It
should be in the same directory as your source code.
Place the following statement in your source file:
#include "comdefs.h" // note "", not <>!
*/
/* Don't worry about what the following does, but be sure */
/* to keep it if you might use a different version of the */
/* Turbo or Borland C/C++ compiler... */
#ifdef __cplusplus /* defined for C++ 3.x */
#define __CPPARGS ... /* supports C++ 3 & BC */
#else
#define __CPPARGS /* supports C++ 2.x */
#endif
/* 8259 Priority Interrupt Controller registers and bits */
#define PIC_ICR 0x20 /* interrupt ctrl reg */
#define PIC_IMR 0x21 /* interrupt mask reg */
#define IRQ4M 0x10 /* COM1/3 interrupt mask */
#define IRQ3M 0x08 /* COM2/4 interrupt mask */
#define EOI 0x20 /* End of Interrupt bit */
#define INT_C 0x0C /* COM1/3 interrupt no. */
#define INT_B 0x0B /* COM2/4 interrupt no. */
/* Port-specific definitions */
#define COM1 0x3F8 /* COM port base address */
#define COM2 0x2F8
#define COM3 0x3E8
#define COM4 0x2E8
/* The following declarations refer to the offset from */
/* the base address of COMx for each of the 8250 registers */
#define THR 0 /* DLAB = 0 */
#define RBR 0 /* 0 */
#define DLL 0 /* 1 */
#define DLM 1 /* 1 */
#define IER 1 /* 0 */
#define IIR 2
#define LCR 3
#define MCR 4
#define LSR 5
#define MSR 6
/* Line control register bit definitions */
#define DLAB 0x80 /* 1 => baud divisor */
#define SBRK 0x40 /* 1 => set TX to space */
#define STKP 0x20 /* 1 => mark or space */
#define EPS 0x10 /* 1 => even or space */
#define PEN 0x08 /* 1 => enables parity */
#define STB 0x04 /* 1 => 1.5 or 2 stops */
#define WLS1 0x02 /* 00 = 5; 01 = 6 bits */
#define WLS2 0x01 /* 10 = 7; 11 = 8 bits */
/* Line status register bit definitions */
#define TSRE 0x40 /* TX shift reg empty */
#define THRE 0x20 /* TX holding reg ety */
#define BI 0x10 /* break detected */
#define FE 0x08 /* framing error */
#define PE 0x04 /* parity error */
#define OE 0x02 /* overrun error */
#define DR 0x01 /* RX data ready */
/* Modem control register bit definitions */
#define LOOP 0x10 /* 1 => local loopback */
#define OUT2 0x08 /* set to enable ints */
#define OUT1 0x04 /* user output 2 */
#define RTS 0x02 /* Request to Send o/p */
#define DTR 0x01 /* Data Terminal Ready */
/* Modem status register bit definitions */
#define RLSD 0x80 /* 1 => carrier detect */
#define RI 0x40 /* 1 => ring indicator */
#define DSR 0x20 /* 1 => Data Set Ready */
#define CTS 0x10 /* 1 => Clear to Send */
#define DRLSD 0x08 /* 1 => change in RLSD */
#define TERI 0x04 /* 1 => RI changed 1->0 */
#define DDSR 0x02 /* 1 => change in DSR */
#define DCTS 0x01 /* 1 => change in CTS */
/* Interrupt enable register bit definitions */
#define EDSSI 0x08 /* int on RI or RLSD >1 */
#define ELSI 0x04 /* break or data error */
#define ETBEI 0x02 /* int on THRE -> 1 */
#define ERBFI 0x01 /* int on DR -> 1 */
/* Interrupt identification register bit definitions */
#define ID1 0x04 /* ID1 ID0 Int. Source */
#define ID0 0x02 /* 1 1 brk or error */
/* 1 0 data ready */
/* 0 1 THR empty */
/* 0 0 RI/RLSD */
#define IPEN 0x01 /* interrupt pending */
--=====================_861347903==_--
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