[Diy_efi] Continuing the chip switcher "problem"
Robert W Hughes
rwhughe at oplink.net
Wed Feb 16 16:00:10 GMT 2005
> I took a look at a datasheet for the 74xx374 and think I understand
> what is going on. You put your new request of change of data in, and
> on the next positive slope of the clock, the old data will be
> switched to the new data. So until the clock rises, the old data
> will be there. And if I'm getting this right, the data is only read
> at the negative transition of the clock? So you will have done the
> change during the time you aren't performing a read. And the system
> will be no wiser. Even if an instruction was in being read, and not
> data from the chip it will still be transparent. Hence the
> Transparent latch name. Could you look at the Not PSEN signal I've
> taken from the MCU at pin 23, and the Not OE pin as I've recorded
> them on my webpage.
Your analysis of the operation is correct. I looked at your traces, but
none of these are usable, due to scope limitations.
> http://home.comcast.net/~hexibot43/Waveforms.htm
> Is it possible that although the signal never reaches Vss or ground
> the computer could still be reading it as Vss or logic state low? Is
> it possible that when it reaches the 2.5 v median point the computer
> accepts that as ground?
Apparently your DSO does have an alias filter, and due to this you see
only the average of the signal when it is changing at at a much higher
rate than your scope can handle. A better (higher sample rate or
bandwidth) scope will surely show the signals switching between ground
and Vss/Vcc/whatever.
--
Robert W. Hughes (Bob)
BackYard Engineering
29:40.237N, 95:28.726W or perhaps 30:55.265N, 95:20.590W
Houston, Texas "The city with too much Oxygen"
rwhughe at oplink.net
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