[Diy_efi] Continuing the chip switcher "problem"

mbelloli at speedymotorsports.com mbelloli at speedymotorsports.com
Wed Feb 16 16:14:10 GMT 2005


Will,
     I'm guess my DSO is lying to me.  I do have it set to DC, and I'm
connecting the ground to the Vss pin of the eprom.  The CE line is
always low.  It doesn't appear they are using it at all.  I'm hoping
putting the latch in, and seeing what it does will give me an answer
to whether my meter is lying to me or not.

Marcello





> Marcello,
>
> I think I would tend to clock the address changes through the '374 using
> not
> CE rather than not OE, but both would probably work just as well.  I
> don't
> know any logic family (NMOS, CMOS, TTL, HCTTL etc) that would interpret
> the
> logic level transitions you are seeing as going from logic 1 to logic  0.
> There
> must be a potential difference between the ground you are picking  up for
> the
> scope probe and the logic ground the memory device is seeing.
>
> I don't think your problem is grounding, I think it's just the address
> line
> transitions being visible during read cycles.
>
> Is your DSO set to couple the signals through into the Y channel as a DC
> signal or as AC?
> It should be set for a DC signal of course.
>
> Will
>
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>

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