[Diy_efi] Continuing the chip switcher "problem"

mbelloli at speedymotorsports.com mbelloli at speedymotorsports.com
Thu Feb 17 07:43:13 GMT 2005


Everyone,
     This evening I made an inline board between my eeprom board, and my
PicChip switcher.  I used a 74HS374, as suggested.  And I think I got
it.  I had two address lines to control, so I used two flip-flops to
buffer the information from my switches.  The 74HS374 will hold off
on a change to the Q lines (output lines) until the clock is occuring
an upward slope.  Now that I've put it together I've got two new
questions.
     1.  I Don't need a pull up resistors, Which I was using with the
switch before inbetween the flip-flop and the eeprom?  The flip-flop
is capable of holding the state H or L on its own.  I should be able
to simply drive the address lines of the eeprom with the flip-flop
output, correct?
     2.  In driving logic on the 74HS374 do I need to drive it thru
something like a 10kohm resistor?  There is an output control at pin
1 that if I understand what I'm doing I should drive to ground all
the time.  I simply connected straight to Vss.  That should be ok
since I'm never having to change the state of the this pin, correct?

     I've taken the Signal that was going to the Not OE line of the eprom,
and used that as my clock in.  If all goes right, my DSO lied to me,
and this should simply do the trick.  I can understand why everyone
was saying why did I need the PicChip.  I could have done this all
with a simple switch, and some logic chips.  Not all problems can be
handled with software!  Well, at least I've got a nice text screen. 
And later maybe the ability to change a cell of the spark or fuel
tables on the fly.  And Valet mode, by dropping the top speed, and
rev limit.
     Thanks everyone - I could not have done this without help.  A lot of
help.

Marcello


>> I took a look at a datasheet for the 74xx374 and think I understand
>> what is going on.  You put your new request of change of data in, and
>> on the next positive slope of the clock, the old data will be
>> switched to the new data.  So until the clock rises, the old data
>> will be there.  And if I'm getting this right, the data is only read
>> at the negative transition of the clock?  So you will have done the
>> change during the time you aren't performing a read.  And the system
>> will be no wiser.  Even if an instruction was in being read, and not
>> data from the chip it will still be transparent.  Hence the
>> Transparent latch name.  Could you look at the Not PSEN signal I've
>> taken from the MCU at pin 23, and the Not OE pin as I've recorded
>> them on my webpage.
>
> Your analysis of the operation is correct. I looked at your traces, but
> none of these are usable, due to scope limitations.
>
>>            http://home.comcast.net/~hexibot43/Waveforms.htm
>>      Is it possible that although the signal never reaches Vss or ground
>> the computer could still be reading it as Vss or logic state low?  Is
>> it possible that when it reaches the 2.5 v median point the computer
>> accepts that as ground?
>
> Apparently your DSO does have an alias filter, and due to this you see
> only the average of the signal when it is changing at at a much higher
> rate than your scope can handle. A better (higher sample rate or
> bandwidth) scope will surely show the signals switching between ground
> and Vss/Vcc/whatever.
>
> --
> Robert W. Hughes (Bob)
> BackYard Engineering
> 29:40.237N, 95:28.726W or perhaps 30:55.265N, 95:20.590W
> Houston, Texas "The city with too much Oxygen"
> rwhughe at oplink.net
>
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> diy_efi mailing list
> diy_efi at diy-efi.org
> http://lists.diy-efi.org/mailman/listinfo/diy_efi
>

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