EPROM Emulator Proposal

[steve ravet]

I am in total agreement with this design.  I have a few questions below
though...

Ludis Langens wrote:
> The DPRAM is split into two banks.  The PIC can read and write in either
> bank.  It also controls which bank the ECM reads.  This allows the ECM
> to execute out of one bank while the PIC writes into the other bank.
> Once a download is finished, the ECM can be switched instantly to the
> new bank.  A 64Kbyte DPRAM allows emulating up to a 27256 EPROM.  A
> 128Kbyte DPRAM emulates a 27512.

Lets make the banks an option.  They're useful for storing multiple
images, but if a single bank is allowed then the 64k chip emulates to up
27512.  The PIC will have to watch for collisions on writes and repeat
them if necessary.
It's mostly a software issue.


> The ECM's A0-A15, D0-D7, ~CS, and ~OE connect directly to one side of
> the DPRAM.  The address lines are shifted up by one so that the DPRAM A0
> can be used for the bank select.
> 
> The PIC connects to the DPRAM and piggybacked EPROM/MEMCAL as follows:
> 
> RA0..RA1  A14..A15 (DPRAM A15..A16)
> RA2       PIC RAM bank select (DPRAM A0)
> RA3       ECM RAM bank select (ECM side DPRAM A0 via latch)
> RA4       EPROM power control (active low) (RA4 is open-collector)
> RA5       EPROM ~CS
> 
> RB0..RB7  A0..A7 (DPRAM A1..A8)
> 
> RC0..RC5  A8..A13 (DPRAM A9..A14)
> RC6       TxD
> RC7       RxD
> 
> RD0..RD7  D0-D7
> 
> RE0       ~OE (DPRAM & EPROM)
> RE1       ~WE (DPRAM R/~W)
> RE2       DPRAM ~CS

If we go with the one-bank-emulates-up-to-27512 and the 64K chip then
there's not an A16 on the DPRAM.  That leaves RA1 and RA3 available for
bank-switching, which allows up to 4 banks for the smaller ECMs.  I'd
use the top address lines to bank switch instead of the bottom but it
works either way.  Two jumpers would select between PIC controlling the
bank lines or the ECM controlling them.  Also, if a regular switch were
used to control the power to the EPROM then another PIC output is
available for bank switching.  Maybe that's too many banks.

> 
> For the battery back-up feature, all the DPRAM inputs will need 100K (or
> so) ohm pulldown resistors.  The DPRAM has two chip select inputs on
> each side.  The second input can be controlled by the battery back-up
> circuit.  This circuit still needs to be designed.  I don't have access
> to the latest power controller chip data.  I think someone had a
> proposal for this.  Note that the DPRAM needs to be fed 5 volts even

JSG said he did a battery backup circuit for his 68000 board.

> Is there enough interest for me to draw up a schematic in a few days?

YES.  I'll commit to one of these right now.  I'd like to see the
schematic to make sure I understand it completely.


-- 
Steve Ravet
ARM, INC
steve.ravet at arm.com
www.arm.com