160 baud ALDL data stream format - reference URL?

[steve ravet]

Peter Gargano wrote:
> 
> I looked through the archives and found an explanation by Steve
> Ravet (thanks Steve), of the 160 baud ALDL data stream. The diagram
> goes something like this:
> 
>        160 baud data format - 1 bit time
> 
>              S   0        1    S
>          ..__     ........_____    ...
>              |   ^        ^    |   ^
>              V___|........|    V___|..
>             T0   T1  T2   T3   T4
> 
> Time T0 to T4 is 6.25 mSec (ie 6.25 mSec = 1/160 Sec ==> 160 baud)
>      T3 to T4 is minimum of 0.5 mSec
>      T0 to T2 is between 1.5 and 2.3 mSec
> 
> A zero or one bit is determined at time T2 (the  sample time).
> A low voltage is a 1 logic level and a high voltage is a 0 logic
> level for the bit.
> 
> QUESTION:
> 
> I'm not sure what time T0 to T1 is, and I'd like confirmation
> of the other times shown above. Is T0 to T2 really between 1.5
> to 2.3 mSec., I would have expected it to be a bit larger?

Man, that was a long time ago...

Keep reading those threads and you'll find a followup from Ludis with
more timing details.  The spec I typed that in from showed T0-T2 to be
variable between those limits but Ludis said it's always the same in
every 160 ALDL he's looked at.

He also had a good idea for reading that signal via a regular UART.

--steve

> 
> I was also wondering if there is a primary reference URL
> someone may know about that describes the times T0 to T4.
> 
> Thanks guys,
> --
> Peter Gargano

-- 
Steve Ravet
steve.ravet at arm.com
Advanced Risc Machines, Inc.
www.arm.com