EPROM emulator

[jgwynne at mrcday.com]

   In message <Pine.LNX.3.96.990212020658.14316A-100000 at svn.net>, you write:
 
| A Cypress cy7c008 or cy7c009 might work
| http://www.cypress.com/cypress/prodgate/dual/cy7c019.htm
| 
| Accesses to the same address at the same time are a problem.  Since
| there's probably no way to make the ECM cpu wait, collisions would have to
| be avoided altogether or the ECM cpu should be able to terminate the other
| sides memory cycle if needed. The rams mentioned have access times of 20ns
| or lower compared to the 120ns needed, which may help in the logic design
| for the collision handling. 


We need a price quote.

Approach #3.... time multiplex bus cycles with a single fast
(single port) SRAM. Probably almost 1/2 the chip count, all cheap and 
readily available. I'll sketch up something to get a better idea of
the part count... Any other approaches?

john