68HC11s

Roger Heflin rah at horizon.hit.net
Sun Jun 27 03:26:52 GMT 1999



On Sun, 27 Jun 1999, Ross Myers wrote:

> 
> -----Original Message-----
> From: Roger Heflin <rah at horizon.hit.net>
> To: gmecm at efi332.eng.ohio-state.edu <gmecm at efi332.eng.ohio-state.edu>
> Cc: gmecm at esl.eng.ohio-state.edu <gmecm at esl.eng.ohio-state.edu>
> Date: Tuesday, June 22, 1999 11:15 PM
> Subject: Re: 68HC11s
> 
> <SNIP>
> >Mine lnes up pretty
> >closely with a MC68HC11F1 and everything seems to like up right, ie
> >things that should be on A/D ports were, and I really did not find any
> >inconsitancies between the modesl.   If they are using a more basic
> >68HC11 chip the real question is how much extra ports were added and
> >were in the data space were they added.
> 
> Roger please explain this to me.
> Firstly, are we assuming the 808/165 P4's are based on the F1?, if so why do
> the 808/165 have a 52 pin CPU?, when the F1 is 68pin.
> 
> Secondly, The A/D ports, I've been looking at the disassembly of the BUA
> PROM, and what I can't figure is the A/D channel selects. It just doesn't
> work out the same as the F1. On the ROM, to select Ch7, you LDDA #$70 and
> jump to the A/D sub. This value doesn't seem right, according to my 68HC11F1
> book Ch7 would be selected by LDDA #$07.
> 

Later model, mine is a 93 Z28, it has the same computer as a 92-93 LT1
in vette or a f-body, it has 32k of prom, and it is I believe a later
computer than a P4, and a F1 has both a 68pin and a 80 pin, and there
is not telling what GM could get them to offer just for them.

I don't think anyone has a shorthand numbering for the computer I that
is used.   The later model (93+) also see to closely resembly a F1
series chip.

I am not sure what you are talking about on the A/D selects, on the F1
you write a #07 to $1030 to select channel 7, but generally I have
notcied they don't select a single channel, they tell it to scan and
load all of them and then read out the set of 4 registers.  #70 being
written to $1030 will result in the A/D registers being filled with 4
separate channels of data.  In mine that is always how them seem to be
doing things, I never noticed anyplace where they dealt with a single
channel, they seem to have the A/d sample 4 at the same time (or in
the same conversion).  0 being in the select bit tells them to convert
channel 0-3, if 4 was in the select bit (#74) this would be telling it
to convert channels 4-7, and load that into the result registers.

Does this look like what is being done?

			Roger




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