'727('730) sfi was:Re: curious about sfi

[Mike Swayze]

did a little digging and thinking (not an electronics whiz). 
after looking at the disasm. aujp.bin I was wondering where the # of pulse would be calculated. since it is batch fired the pulses would be setup for 2(4?) per engine cycle (2- banks). would it be possible to change it to fire 8 times per cycle? 
Is there enough time (cpu cycles) to do this at 6000rpm?
assuming one could get the correct number of pulses out---
is there a serial buffer that would allow them to be synched to fire thru an 8-channel mux/demux (switch) or would some sort of 555 triggered count up count down arrangement need to be configured to synch the pulse.(using tach drive counter for mux/demux with #1TDC reference setup to reset counter to null).
I checked the data sheet for 74hc4051 but am not familiar with anything beyond simple digital logic circuits
and am in the process of trying to find a chip to synch(buffer) the pulse from the ECM inj. driver. 
I am assuming static sfi timing(to simplify it).

byE
Mike
Swayze
mswayze at truswood.com
kswayze at bellsouth.net
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